Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
Wire routing in a VLSI chip often requires minimization of wire-length as well as the number of intersections among multiple nets. Such an optimization problem is computationally ...
Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhatt...
As Computer Science educators, we know that students learn more from projects that are fun and challenging, that seem “real” to them, and that allow them to be creative in des...
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Mobile and wearable computers present input/output problems due to limited screen space and interaction techniques. When mobile, users typically focus their visual attention on na...
Stephen A. Brewster, Joanna Lumsden, Marek Bell, M...