Sciweavers

235 search results - page 16 / 47
» On the Inertia of the Asynchronous Circuits
Sort
View
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 3 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
15 years 4 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
DAC
1996
ACM
15 years 3 months ago
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis
This paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that "behave uniforml...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...
VTS
1997
IEEE
105views Hardware» more  VTS 1997»
15 years 4 months ago
Critical hazard free test generation for asynchronous circuits
We describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. Wepropos...
Ajay Khoche, Erik Brunvand
ACSD
2006
IEEE
118views Hardware» more  ACSD 2006»
15 years 5 months ago
Strategies for Optimised STG Decomposition
— When synthesising an asynchronous circuit from an STG, one often encounters the state explosion problem. In order to alleviate this problem one can decompose the STG into small...
Mark Schäfer, Walter Vogler, Ralf Wollowski, ...