Sciweavers

548 search results - page 33 / 110
» On the Limitations of Power Macromodeling Techniques
Sort
View
CODES
2010
IEEE
14 years 9 months ago
A greedy buffer allocation algorithm for power-aware communication in body sensor networks
Monitoring human movements using wireless sensory devices promises to revolutionize the delivery of healthcare services. In spite of their potentials for many application domains,...
Hassan Ghasemzadeh, Roozbeh Jafari
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 5 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
87
Voted
ASPLOS
2008
ACM
15 years 1 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
15 years 4 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...

Lecture Notes
889views
16 years 10 months ago
Future Directions in Computing
Silicon-based electronics is the foundation of computing devices. The computer industry is reaching an important milestone, where physical limits arising from using optical lithogr...
Sherief Reda