Sciweavers

3047 search results - page 445 / 610
» On the Meaning of Logical Completeness
Sort
View
CGO
2003
IEEE
15 years 3 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
HAPTICS
2003
IEEE
15 years 3 months ago
Passive and Active Assistance for Human Performance of a Simulated Underactuated Dynamic Task
Machine-mediated training of dynamic task completion is typically implemented with passive intervention via virtual fixtures or active assist by means of record and replay strateg...
Marcia Kilchenman O'Malley, Abhishek Gupta
ISVLSI
2003
IEEE
147views VLSI» more  ISVLSI 2003»
15 years 3 months ago
Automated Dynamic Memory Data Type Implementation Exploration and Optimization
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
Marc Leeman, Chantal Ykman-Couvreur, David Atienza...
CASES
2003
ACM
15 years 3 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
CAISE
2003
Springer
15 years 3 months ago
Process-aware Authoring of Web-based Educational Systems
In this paper we discuss how the concept of ontology can be beneficial for the authoring support of Web-based educational systems (WBES). We take a semantic perspective on the know...
Lora Aroyo, Riichiro Mizoguchi