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» On the Use of Formal Techniques for Validation
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ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 8 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
EUROPKI
2009
Springer
14 years 9 months ago
Validity Models of Electronic Signatures and Their Enforcement in Practice
Abstract. An electronic signature is considered to be valid, if the signature is mathematically correct and if the signer's public key is classified as authentic. While the fi...
Harald Baier, Vangelis Karatsiolis
DATE
2005
IEEE
105views Hardware» more  DATE 2005»
15 years 5 months ago
Mutation Sampling Technique for the Generation of Structural Test Data
Our goal is to produce validation data that can be used as an efficient (pre) test set for structural stuck-at faults. In this paper, we detail an original test-oriented mutation ...
Mathieu Scholivé, Vincent Beroulle, Chantal...
3DIM
2001
IEEE
15 years 3 months ago
Reliable 3D Surface Acquisition, Registration and Validation Using Statistical Error Models
We present a complete data acquisition and processing chain for the reliable inspection of industrial parts considering anisotropic noise. Data acquisition is performed with a str...
Jens Guehring
MMNS
2004
89views Multimedia» more  MMNS 2004»
15 years 1 months ago
Automated Validation of Service Configuration on Network Devices
Due to the significant development of network services in the past few years, their validation has become increasingly difficult. The advent of novel approaches to the issue of val...
Sylvain Hallé, Rudy Deca, Omar Cherkaoui, R...