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ICPADS
2006
IEEE
15 years 3 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
IEEEPACT
2006
IEEE
15 years 3 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
IJCNN
2006
IEEE
15 years 3 months ago
Sparse Bayesian Models: Bankruptcy-Predictors of Choice?
Abstract— Making inferences and choosing appropriate responses based on incomplete, uncertainty and noisy data is challenging in financial settings particularly in bankruptcy de...
Bernardete Ribeiro, Armando Vieira, João Ca...
ISPASS
2006
IEEE
15 years 3 months ago
Modeling TCAM power for next generation network devices
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
Banit Agrawal, Timothy Sherwood
RTCSA
2006
IEEE
15 years 3 months ago
Instruction Scheduling with Release Times and Deadlines on ILP Processors
ILP (Instruction Level Parallelism) processors are being increasingly used in embedded systems. In embedded systems, instructions may be subject to timing constraints. An optimisi...
Hui Wu, Joxan Jaffar, Jingling Xue
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