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» On the energy-efficiency of software transactional memory
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77
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VLSID
2002
IEEE
123views VLSI» more  VLSID 2002»
15 years 10 months ago
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories
With the increased use of embedded/portable devices such as smart cellular phones, pagers, PDAs, hand-held computers, and CD players, improving energy efficiency is becoming a cri...
Victor Delaluz, Mahmut T. Kandemir, Narayanan Vija...
86
Voted
HPCA
2006
IEEE
15 years 10 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
FPL
2010
Springer
146views Hardware» more  FPL 2010»
14 years 7 months ago
Software Managed Distributed Memories in MPPAs
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
Robin Panda, Jimmy Xu, Scott Hauck
VLDB
1997
ACM
109views Database» more  VLDB 1997»
15 years 1 months ago
Logical and Physical Versioning in Main Memory Databases
We present a design for multi-version concurrency control and recovery in a main memory database, and describe logical and physical versioning schemes that allow read-only transac...
Rajeev Rastogi, S. Seshadri, Philip Bohannon, Denn...
SYSTOR
2009
ACM
15 years 4 months ago
Transactifying Apache's cache module
Apache is a large-scale industrial multi-process and multithreaded application, which uses lock-based synchronization. We report on our experience in modifying Apache’s cache mo...
Haggai Eran, Ohad Lutzky, Zvika Guz, Idit Keidar