44 search results - page 4 / 9 » On the role of timing masking in reliable logic circuit desi... |
ICCAD
2006
IEEE
14 years 3 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
DAC
2007
ACM
14 years 7 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
SEDE
2007
13 years 7 months ago
2007
— Achieving reliability in fault tolerant systems requires both avoidance and redundancy. This study focuses on avoidance as it pertains to the design of microchips. The lifecycl...
ISCC
2005
IEEE
13 years 12 months ago
2005
IEEE
We report an innovative solely optical architecture to implement the centralized wavelength conversion module of the CWC (Controlled Wavelength Conversion) protocol [1]. The propo...
FPGA
2004
ACM
13 years 11 months ago
2004
ACM
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...