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DAC
1996
ACM
15 years 1 months ago
Delay Minimal Decomposition of Multiplexers in Technology Mapping
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
CIE
2010
Springer
15 years 2 months ago
The Peirce Translation and the Double Negation Shift
We develop applications of selection functions to proof theory and computational extraction of witnesses from proofs in classical analysis. The main novelty is a translation of cla...
Martín Hötzel Escardó, Paulo Ol...
CORR
2010
Springer
75views Education» more  CORR 2010»
14 years 10 months ago
Explicit Evidence Systems with Common Knowledge
Justification logics are epistemic logics that explicitly include justifications for the agents' knowledge. We develop a multi-agent justification logic with evidence terms fo...
Samuel Bucheli, Roman Kuznets, Thomas Studer
ICCAD
2002
IEEE
110views Hardware» more  ICCAD 2002»
15 years 6 months ago
Whirlpool PLAs: a regular logic structure and their synthesis
 A regular circuit structure called a Whirlpool PLA (WPLA) is proposed. It is suitable for the implementation of finite state machines as well as combinational logic. A WPLA is ...
Fan Mo, Robert K. Brayton
TVLSI
2008
111views more  TVLSI 2008»
14 years 9 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...