704 search results - page 89 / 141 » On-chip logic minimization |
COLING
2010
14 years 4 months ago
2010
We present a transformation scheme that mediates between description logics (DL) or RDF-encoded ontologies and type hierarchies in feature logics (FL). The DL-to-FL direction is i...
183
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GLVLSI
2011
IEEE
14 years 1 months ago
2011
IEEE
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
DAC
2008
ACM
15 years 11 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
108
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BXML
2003
14 years 11 months ago
2003
We present an approach of how to automatically extract an XML document structure from a conceptual data model that describes the content of the document. We use UML class diagrams ...
NDJFL
2000
14 years 9 months ago
2000
We present an approach to combining three areas of research which we claim are all based on information theory: knowledge representation in Artificial Intelligence and Cognitive Sc...