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CONCUR
2007
Springer
15 years 1 months ago
Temporal Antecedent Failure: Refining Vacuity
We re-examine vacuity in temporal logic model checking. We note two disturbing phenomena in recent results in this area. The first indicates that not all vacuities detected in prac...
Shoham Ben-David, Dana Fisman, Sitvanit Ruah
IPPS
2009
IEEE
15 years 4 months ago
Optimizing assignment of threads to SPEs on the cell BE processor
The Cell is a heterogeneous multicore processor that has attracted much attention in the HPC community. The bulk of the computational workload on the Cell processor is carried by ...
C. Devi Sudheer, T. Nagaraju, Pallav K. Baruah, As...
BMCBI
2005
107views more  BMCBI 2005»
14 years 10 months ago
ProbeMaker: an extensible framework for design of sets of oligonucleotide probes
Background: Procedures for genetic analyses based on oligonucleotide probes are powerful tools that can allow highly parallel investigations of genetic material. Such procedures r...
Johan Stenberg, Mats Nilsson, Ulf Landegren
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
15 years 6 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
JCM
2008
242views more  JCM 2008»
14 years 10 months ago
SimANet - A Large Scalable, Distributed Simulation Framework for Ambient Networks
In this paper, we present a new simulation platform for complex, radio standard spanning mobile Ad Hoc networks. SimANet - Simulation Platform for Ambient Networks - allows the coe...
Matthias Vodel, Matthias Sauppe, Mirko Caspar, Wol...