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EUROPAR
2007
Springer
15 years 4 months ago
A Scheduling Toolkit for Multiprocessor-Task Programming with Dependencies
The performance of many scientific applications for distributed memory platforms can be increased by utilizing multiprocessor-task programming. To obtain the minimum parallel runt...
Jörg Dümmler, Raphael Kunis, Gudula R&uu...
CF
2007
ACM
15 years 1 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
BIRTHDAY
2006
Springer
15 years 1 months ago
Verification by Parallelization of Parametric Code
Abstract. Loops and other unbound control structures constitute a major bottleneck in formal software verification, because correctness proofs over such control structures generall...
Tobias Gedell, Reiner Hähnle
IPPS
2006
IEEE
15 years 3 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
MIDDLEWARE
2000
Springer
15 years 1 months ago
Customization of Object Request Brokers by Application Specific Policies
This paper presents an architectural framework for customizing Object Request Broker (ORB) implementations to application-specific preferences for various non-functional requiremen...
Bo Nørregaard Jørgensen, Eddy Truyen...