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DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 9 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng
144
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ACSC
2007
IEEE
15 years 8 months ago
Cross-Layer Verification of Type Flaw Attacks on Security Protocols
Security protocols are often specified at the application layer; however, application layer specifications give little detail regarding message data structures at the presentation...
Benjamin W. Long, Colin J. Fidge, David A. Carring...
ENTCS
2006
123views more  ENTCS 2006»
15 years 4 months ago
Steering of Discrete Event Systems: Control Theory Approach
Runtime verification involves monitoring the system at runtime to check for conformance of the execution trace to user defined safety properties. Typically, run-time verifiers do ...
Arvind Easwaran, Sampath Kannan, Oleg Sokolsky
TASE
2008
IEEE
15 years 3 months ago
Perspectives in Probabilistic Verification
Soon after the birth of the flourishing research area of model checking in the early eighties, researchers started to apply this technique to finite automata equipped with probabi...
Joost-Pieter Katoen
JSA
2008
131views more  JSA 2008»
15 years 3 months ago
Formal verification of ASMs using MDGs
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...
Amjad Gawanmeh, Sofiène Tahar, Kirsten Wint...