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ICSE
2009
IEEE-ACM
16 years 4 months ago
Analyzing critical process models through behavior model synthesis
Process models capture tasks performed by agents together with their control flow. Building and analyzing such models is important but difficult in certain areas such as safety-cr...
Christophe Damas, Bernard Lambeau, Francois Roucou...
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
16 years 28 days ago
Fast and accurate transaction level models using result oriented modeling
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
Gunar Schirner, Rainer Dömer
QEST
2006
IEEE
15 years 10 months ago
Compositional Performability Evaluation for STATEMATE
Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Eckard Böde, Marc Herbstritt, Holger Hermanns...
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 7 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
ISOLA
2010
Springer
15 years 2 months ago
Enforcing Applicability of Real-Time Scheduling Theory Feasibility Tests with the Use of Design-Patterns
Abstract. This article deals with performance verifications of architecture models of real-time embedded systems. We focus on models verified with the real-time scheduling theory...
Alain Plantec, Frank Singhoff, Pierre Dissaux, J&e...