Sciweavers

79 search results - page 8 / 16
» Operating systems projects built on a simple hardware simula...
Sort
View
OSDI
1996
ACM
15 years 1 months ago
A Trace-Driven Comparison of Algorithms for Parallel Prefetching and Caching
High-performance I/O systems depend on prefetching and caching in order to deliver good performance to applications. These two techniques have generally been considered in isolati...
Tracy Kimbrel, Andrew Tomkins, R. Hugo Patterson, ...
ASPLOS
2006
ACM
15 years 5 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 4 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
ASPLOS
2006
ACM
15 years 5 months ago
Mercury and freon: temperature emulation and management for server systems
Power densities have been increasing rapidly at all levels of server systems. To counter the high temperatures resulting from these densities, systems researchers have recently st...
Taliver Heath, Ana Paula Centeno, Pradeep George, ...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 11 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...