The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
Future microprocessors need low-cost solutions for reliable operation in the presence of failure-prone devices. A promising approach is to detect hardware faults by deploying low-...
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naei...
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz,...
This paper proposes a new link for asynchronous NoC communications that is resilient to transient faults on the wires of the link without impact on the data transfer capability. R...
Simon Ogg, Bashir M. Al-Hashimi, Alexandre Yakovle...