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» Optimal task placement to improve cache performance
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ISCA
2005
IEEE
90views Hardware» more  ISCA 2005»
15 years 3 months ago
Optimizing Replication, Communication, and Capacity Allocation in CMPs
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
Zeshan Chishti, Michael D. Powell, T. N. Vijaykuma...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
15 years 1 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
DAC
2001
ACM
15 years 10 months ago
Improved Cut Sequences for Partitioning Based Placement
Recursive partitioning based placement has a long history, but there has been little consensus on how cut sequences should be chosen. In this paper, we present a dynamic programmi...
Mehmet Can Yildiz, Patrick H. Madden
ARC
2010
Springer
189views Hardware» more  ARC 2010»
15 years 2 days ago
3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable
Abstract. Few of the benefits of exploiting partially reconfigurable devices are power consumption reduction, cost reduction, and customized performance improvement. To obtain thes...
Thomas Marconi, Yi Lu 0004, Koen Bertels, Georgi G...
ICS
2001
Tsinghua U.
15 years 2 months ago
Analytical cache models with applications to cache partitioning
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and t...
G. Edward Suh, Srinivas Devadas, Larry Rudolph