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ICCAD
2006
IEEE
117views Hardware» more  ICCAD 2006»
16 years 2 months ago
Post-routing redundant via insertion and line end extension with via density consideration
- Redundant via insertion and line end extension employed in the post-routing stage are two well known and highly recommended techniques to reduce yield loss due to via failure. Ho...
Kuang-Yao Lee, Ting-Chi Wang, Kai-Yuan Chao
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
16 years 2 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 2 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
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ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
16 years 2 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong
ICCV
2009
IEEE
16 years 19 days ago
Multiperspective Stereo Matching and Volumetric Reconstruction
Stereo matching and volumetric reconstruction are the most explored 3D scene recovery techniques in computer vision. Many existing approaches assume perspective input images and us...
Yuanyuan Ding, Jingyi Yu, and Peter Sturm
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