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» Optimization of coded GMSK systems
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146
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MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
15 years 7 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
EMSOFT
2005
Springer
15 years 9 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
133
Voted
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 8 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
136
Voted
ETT
2002
140views Education» more  ETT 2002»
15 years 3 months ago
Spreading sequences for uplink and downlink MC-CDMA systems: PAPR and MAI minimization
This paper deals with spreading sequences selection for downlink and uplink Multi-Carrier Code Division Multiple Access (MC-CDMA) systems with the aim of minimizing the dynamic ran...
Stéphane Nobilet, Jean-François H&ea...
POPL
2009
ACM
16 years 4 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...