894 search results - page 36 / 179 » Optimizations for LTL Synthesis |
101
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DAC
1997
ACM
15 years 3 months ago
1997
ACM
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
100
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CODES
2005
IEEE
15 years 4 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
116
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SNPD
2003
15 years 11 days ago
2003
The paper discusses simple functional constraint networks and a value propagation method for program construction. Structural synthesis of programs is described as an example of d...
IPPS
2007
IEEE
15 years 5 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
102
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DELTA
2006
IEEE
15 years 5 months ago
2006
IEEE
We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replicati...