We present an approach to bus access optimization and schedulability analysis for the synthesis of hard real-time distributed embedded systems. The communication model is based on...
To reduce the number of synthesis and layout iterations, we present a new delay optimization technique, which inserts buers based on back-annotated detailed routing information. D...
In this paper we combine model-based video synthesis with block-based motion-compensated prediction (MCP). Two frames are utilized far prediction where one frame is the previous d...
: This paper presents an approach to high-level synthesis which is based upon a 0/1 integer programming model. In contrast to other approaches, this model allows solving all three ...
We present an approach to process scheduling for synthesis of safety-critical distributed embedded systems. Our system model captures both the flow of data and that of control. Th...