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ICCAD
1996
IEEE
80views Hardware» more  ICCAD 1996»
15 years 2 months ago
Generalized constraint generation in the presence of non-deterministic parasitics
In a constraint-drivenlayout synthesisenvironment,parasitic constraints are generated and implemented in each phase of the design process to meet a given set of performance specif...
Edoardo Charbon, Paolo Miliozzi, Enrico Malavasi, ...
BIBE
2007
IEEE
126views Bioinformatics» more  BIBE 2007»
14 years 11 months ago
FPGA Acceleration of Phylogeny Reconstruction for Whole Genome Data
In this paper we describe our design and characterization of a co-processor architecture to accelerate median-based phylogenetic reconstruction for generearrangement data. Our curr...
Jason D. Bakos, Panormitis E. Elenis, Jijun Tang
ASPDAC
2009
ACM
133views Hardware» more  ASPDAC 2009»
14 years 11 months ago
A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor
Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. The conventional approaches based on synthesis and simulations a...
Farhad Mehdipour, Hamid Noori, Bahman Javadi, Hiro...
TVLSI
2008
90views more  TVLSI 2008»
14 years 9 months ago
A Special-Purpose Architecture for Solving the Breakpoint Median Problem
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
Jason D. Bakos, Panormitis E. Elenis
INFOCOM
2006
IEEE
15 years 3 months ago
Flow Control Over Wireless Network and Application Layer Implementation
— Flow control, including congestion control for data transmission, and rate control for multimedia streaming, is an important issue in information transmission in both wireline ...
Minghua Chen, Avideh Zakhor