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IPPS
2007
IEEE
15 years 9 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
15 years 7 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
ISCC
2008
IEEE
130views Communications» more  ISCC 2008»
15 years 9 months ago
A graph theory based scheduling algorithm For MIMO-CDMA systems using zero forcing beamforming
We propose efficient scheduling algorithms for downlink MIMO-CDMA systems using zero forcing beamforming to achieve high system throughput with low computational complexity. Base...
Elmahdi Driouch, Wessam Ajib
ICALP
2009
Springer
16 years 3 months ago
Node-Weighted Steiner Tree and Group Steiner Tree in Planar Graphs
We improve the approximation ratios for two optimization problems in planar graphs. For node-weighted Steiner tree, a classical network-optimization problem, the best achievable ap...
Erik D. Demaine, MohammadTaghi Hajiaghayi, Philip ...
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ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
15 years 8 months ago
Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels
This paper proposes for latency insensitive systems a performance optimization technique called channel buffer queue sizing, which is performed after relay station insertion in th...
Ruibing Lu, Cheng-Kok Koh