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» Optimizing Logic Design Using Boolean Transforms
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DATE
2004
IEEE
125views Hardware» more  DATE 2004»
15 years 1 months ago
Fast Comparisons of Circuit Implementations
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
Shrirang K. Karandikar, Sachin S. Sapatnekar
ACL2
2006
ACM
15 years 3 months ago
A verifying core for a cryptographic language compiler
A verifying compiler is one that emits both object code and a proof of correspondence between object and source code.1 We report the use of ACL2 in building a verifying compiler f...
Lee Pike, Mark Shields, John Matthews
79
Voted
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
15 years 1 months ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin
DAC
2007
ACM
15 years 10 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
88
Voted
ICCV
2009
IEEE
14 years 7 months ago
Fast realistic multi-action recognition using mined dense spatio-temporal features
Within the field of action recognition, features and descriptors are often engineered to be sparse and invariant to transformation. While sparsity makes the problem tractable, it ...
Andrew Gilbert, John Illingworth, Richard Bowden