2703 search results - page 221 / 541 » Optimizing memory transactions |
132
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ISPD
2000
ACM
15 years 9 months ago
2000
ACM
In this paper, we present an algorithm for delay minimization of interconnect trees by simultaneous buffer insertion/sizing and wire sizing. The algorithm integrates the quadratic...
144
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VLDB
1992
ACM
15 years 8 months ago
1992
ACM
This paper evaluates the performance of the parallel, main-memory DBMS, PRISMA/DB. First, an architecture for parallel query execution is presented. A performance model for the ex...
146
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TNN
1998
15 years 4 months ago
1998
Abstract—It is well known that for finite-sized networks, onestep retrieval in the autoassociative Willshaw net is a suboptimal way to extract the information stored in the syna...
140
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
153
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KR
2004
Springer
15 years 10 months ago
2004
Springer
Recent work shows that the memory requirements of bestfirst heuristic search can be reduced substantially by using a divide-and-conquer method of solution reconstruction. We show...