2703 search results - page 319 / 541 » Optimizing memory transactions |
129
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
134
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DATE
2008
IEEE
15 years 10 months ago
2008
IEEE
In many applications string pattern matching is one of the most intensive tasks in terms of computation time and memory accesses. Network Intrusion Detection Systems and DNA Seque...
DASFAA
2007
IEEE
15 years 10 months ago
2007
IEEE
Abstract. Researchers have modified existing index structures into ones optimized for CPU cache performance in main memory database environments. A Cache Sensitive B+-Tree is one o...
126
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
SAMOS
2007
Springer
15 years 10 months ago
2007
Springer
—This paper presents the Weight-Watcher service. This service aims at providing resource consumption measurements and estimations for software executing on resourceconstrained de...