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» Optimizing memory transactions
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94
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DAC
2009
ACM
16 years 4 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk
147
Voted
CHI
2006
ACM
16 years 4 months ago
Generating automated predictions of behavior strategically adapted to specific performance objectives
It has been well established in Cognitive Psychology that humans are able to strategically adapt performance, even highly skilled performance, to meet explicit task goals such as ...
Katherine Eng, Richard L. Lewis, Irene Tollinger, ...
CHI
2003
ACM
16 years 4 months ago
Shorthand writing on stylus keyboard
We propose a method for computer-based speed writing, SHARK (shorthand aided rapid keyboarding), which augments stylus keyboarding with shorthand gesturing. SHARK defines a shorth...
Shumin Zhai, Per Ola Kristensson
122
Voted
CVPR
2010
IEEE
15 years 10 months ago
Interest Seam Image
We propose interest seam image, an efficient visual synopsis for video. To extract an interest seam image, a spatiotemporal energy map is constructed for the target video shot. T...
Xiao Zhang, Gang Hua, Lei Zhang, Heung-Yeung Shum
121
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...