2703 search results - page 398 / 541 » Optimizing memory transactions |
119
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ISPA
2004
Springer
15 years 9 months ago
2004
Springer
HPL is a parallel Linpack benchmark package widely adopted in massive cluster system performance test. On HPL data layout among processors, a law to determine block size NB theoret...
149
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CC
2003
Springer
15 years 8 months ago
2003
Springer
Popular mobile code architectures (Java and .NET) include verifiers to check for memory safety and other security properties. Since their formats are relatively high level, suppor...
132
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DSD
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near ...
126
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MICRO
2002
IEEE
15 years 8 months ago
2002
IEEE
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
ICALP
2010
Springer
15 years 8 months ago
2010
Springer
We find “combinatorially optimal” (guaranteed by the degree-sequence alone) independent sets for graphs and hypergraps in linear space in the semi-streaming model. We also pr...