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DAC
2002
ACM
16 years 2 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
TWC
2008
131views more  TWC 2008»
15 years 1 months ago
Optimal transmission strategies for rayleigh fading relay channels
In this paper, a decode-and-forward (DF) single relay model in a Rayleigh fading environment is considered. The outage probability and ergodic rate for this model are derived. With...
Yonglan Zhu, Yan Xin, Pooi Yuen Kam
ENGL
2007
177views more  ENGL 2007»
15 years 1 months ago
Design of a Genetic-Algorithm-Based Steam Temperature Controller in Thermal Power Plants
Abstract—This paper presents a systematic approach for the design of temperature controller using genetic algorithms (GAs) for thermal power plant subsystems and investigates the...
Ali Reza Mehrabian, Morteza Mohammad-Zaheri
IPPS
2007
IEEE
15 years 8 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
ICCD
2002
IEEE
114views Hardware» more  ICCD 2002»
15 years 10 months ago
Balancing the Interconnect Topology for Arrays of Processors between Cost and Power
High performance SoC requires nonblocking interconnections between an array of processors built on one chip. With the advent of deep sub-micron technologies, switches are becoming...
Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Che...