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MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 9 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
IPPS
2010
IEEE
15 years 2 months ago
Servet: A benchmark suite for autotuning on multicore clusters
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
Jorge González-Domínguez, Guillermo ...
ICPADS
2007
IEEE
15 years 10 months ago
Persistence and communication state transfer in an asynchronous pipe mechanism
Abstract— Emergent wide-area distributed systems like computational grids present opportunities for large scientific applications. On these systems, communication mechanisms hav...
Philip Chan, David Abramson
DAC
1996
ACM
15 years 8 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
CONEXT
2010
ACM
15 years 2 months ago
Optimal content placement for a large-scale VoD system
IPTV service providers offering Video-on-Demandcurrently use servers at each metropolitan office to store all the videos in their library. With the rapid increase in library sizes...
David Applegate, Aaron Archer, Vijay Gopalakrishna...