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CASES
2008
ACM
15 years 7 months ago
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...
Chengmo Yang, Alex Orailoglu
ISCA
1998
IEEE
129views Hardware» more  ISCA 1998»
15 years 9 months ago
Memory System Characterization of Commercial Workloads
Commercial applications such as databases and Web servers constitute the largest and fastest-growing segment of the market for multiprocessor servers. Ongoing innovations in disk ...
Luiz André Barroso, Kourosh Gharachorloo, E...
GECCO
2009
Springer
166views Optimization» more  GECCO 2009»
15 years 11 months ago
Genetic programming in the wild: evolving unrestricted bytecode
We describe a methodology for evolving Java bytecode, enabling the evolution of extant, unrestricted Java programs, or programs in other languages that compile to Java bytecode. B...
Michael Orlov, Moshe Sipper
ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
13 years 7 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
14 years 8 months ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas