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» Optimizing the Use of High Performance Software Libraries
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WMPI
2004
ACM
15 years 10 months ago
Scalable cache memory design for large-scale SMT architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
Muhamed F. Mudawar
FPL
2008
Springer
150views Hardware» more  FPL 2008»
15 years 6 months ago
Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs
Wavefront algorithms, such as the Smith-Waterman algorithm, are commonly used in bioinformatics for exact local and global sequence alignment. These algorithms are highly computat...
Betul Buyukkurt, Walid A. Najjar
285
Voted

Publication
767views
17 years 2 months ago
Analysis of the Increase/Decrease Algorithms for Congestion Avoidance in Computer Networks
Congestion avoidance mechanisms allow a network to operate in the optimal region of low delay and high throughput, thereby, preventing the network from becoming congested. This is ...
D. Chiu and R. Jain
CDC
2008
IEEE
136views Control Systems» more  CDC 2008»
15 years 11 months ago
Estimation over heterogeneous sensor networks
Abstract— Design trade-offs between estimation performance, processing delay and communication cost for a sensor scheduling problem is discussed. We consider a heterogeneous sens...
Henrik Sandberg, Maben Rabi, Mikael Skoglund, Karl...
IEEESCC
2005
IEEE
15 years 10 months ago
Satisfying Database Service Level Agreements while Minimizing Cost through Storage QoS
The emerging paradigms of service oriented architectures and utility-based computing have the potential to greatly reduce the cost of data management. Data management service prov...
Frederick Reiss, Tapas Kanungo