348 search results - page 24 / 70 » PAM-Blox: High Performance FPGA Design for Adaptive Computin... |
114
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ANCS
2008
ACM
14 years 11 months ago
2008
ACM
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
101
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ISVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
CLUSTER
2006
IEEE
15 years 3 months ago
2006
IEEE
Clusters are the most common solutions for high performance computing at the present time. In this kind of systems, an important challenge is the I/O subsystem design. Typically, ...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...