Sciweavers

2020 search results - page 381 / 404
» PAPER - Accelerating parallel evaluations of ROCS
Sort
View
CODES
2005
IEEE
15 years 5 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ISORC
2005
IEEE
15 years 5 months ago
Heterogeneous Adaptive Component-Based Applications with Adaptive.Net
Adaptation to changing environmental conditions is a major challenge for most distributed applications. The service-oriented programming paradigm leads to an increasing number of ...
Andreas Rasche, Marco Puhlmann, Andreas Polze
EMSOFT
2005
Springer
15 years 5 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
123
Voted
HPCC
2005
Springer
15 years 5 months ago
An Energy-Efficient Uni-scheduling Based on S-MAC in Wireless Sensor Network
S-MAC is a MAC (Medium Access Control) protocol as specialized for the wireless sensor network in order to sacrifice transmission delay and extend the working life of the whole sen...
Tae-Seok Lee, Yuan Yang, Ki-Jeong Shin, Myong-Soon...
ICS
2004
Tsinghua U.
15 years 5 months ago
EXPERT: expedited simulation exploiting program behavior repetition
Studying program behavior is a central component in architectural designs. In this paper, we study and exploit one aspect of program behavior, the behavior repetition, to expedite...
Wei Liu, Michael C. Huang