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137
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IIE
2007
154views more  IIE 2007»
15 years 10 days ago
Computer Aided Modelling Exercises
This paper describes a didactical Computer Aided Software Engineering (CASE)-tool that was developed for use within the context of a course in object-oriented domain modelling. In...
Monique Snoeck, Raf Haesen, Herman Buelens, Manu D...
NOCS
2007
IEEE
15 years 6 months ago
Fast, Accurate and Detailed NoC Simulations
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
Pascal T. Wolkotte, Philip K. F. Hölzenspies,...
DSD
2008
IEEE
124views Hardware» more  DSD 2008»
15 years 6 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
91
Voted
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
15 years 6 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
15 years 7 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...