Sciweavers

217 search results - page 28 / 44
» POSIX modeling in SystemC
Sort
View
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
15 years 4 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
146
Voted
FMCAD
2006
Springer
15 years 4 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
FPL
2005
Springer
96views Hardware» more  FPL 2005»
15 years 6 months ago
Dynamic Reconfiguration with hardwired Networks-on-Chip on future FPGAs
Due to their layered approach, Networks-on-Chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a fu...
Ronald Hecht, Stephan Kubisch, Andreas Herrholtz, ...
96
Voted
DSD
2002
IEEE
146views Hardware» more  DSD 2002»
15 years 5 months ago
Configurable Memory Organisation for Communication Applications
A configurable memory organisation for the execution of Hiperlan/2 transceiver baseband processing and MPEG2 decoding is presented. The configuration of the memory system is done ...
Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivain...
98
Voted
FORMATS
2010
Springer
14 years 10 months ago
A Framework for Verification of Software with Time and Probabilities
Abstract. Quantitative verification techniques are able to establish system properties such as "the probability of an airbag failing to deploy on demand" or "the exp...
Marta Z. Kwiatkowska, Gethin Norman, David Parker