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» PRISM: An Integrated Architecture for Scalable Shared Memory
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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 3 days ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
94
Voted
CCS
2011
ACM
13 years 9 months ago
VMCrypt: modular software architecture for scalable secure computation
Garbled circuits play a key role in secure computation. Unlike previous work, which focused mainly on efficiency and automation aspects of secure computation, in this paper we foc...
Lior Malka
ICDCS
2003
IEEE
15 years 3 months ago
An Integrated Resource Sharing Policy for Multimedia Storage Servers Based on Network-Attached Disks
In this paper, we propose using the network-attached disk (NAD) architecture to design highly scalable and cost-effective multimedia-on-demand (MOD) servers. In order to ensure en...
Nabil J. Sarhan, Chita R. Das
61
Voted
EOR
2007
87views more  EOR 2007»
14 years 9 months ago
An optimal and scalable parallelization of the two-list
In this paper, we suggest a parallel algorithm based on a shared memory SIMD architecture for solving an n item subset-sum problem in time O(2n/2 /p) by using p = 2q processors, 0...
Carlos Alberto Alonso Sanches, Nei Yoshihiro Soma,...
MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
15 years 3 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas