66 search results - page 8 / 14 » Packet Delay-Aware Scheduling in Input Queued Switches |
INFOCOM
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch arch...
ANCS
2007
ACM
15 years 1 months ago
2007
ACM
All-optical packet switching is a promising candidate for future high-speed switching. However, due to the absence of optical Random Access Memory, the traditional Virtual Output ...
HOTI
2002
IEEE
15 years 2 months ago
2002
IEEE
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
ANCS
2006
ACM
15 years 3 months ago
2006
ACM
Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspo...
FOCS
2003
IEEE
15 years 2 months ago
2003
IEEE
The essence of an Internet router is an n ¡ n switch which routes packets from input to output ports. Such a switch can be viewed as a bipartite graph with the input and output p...