Clustered architectures which intend to process data within a localized PE are one of the approaches to increase the performance under the difficulties of the wire delay problems...
In this paper, we present a new capacitance extraction method named Dimension Reduction Technique (DRT) for 3D VLSI interconnects. The DRT converts a complex 3D problem into a ser...
Wei Hong II, Weikai Sun, Zhenhai Zhu, Hao Ji, Ben ...
Abstract. The current generation of data mining tools have limited capacity and performance, since these tools tend to be sequential. This paper explores a migration path out of th...
We introduce a master–worker framework for parallel global optimization of computationally expensive functions using response surface models. In particular, we parallelize two r...
This paper describes the implementation of a featurebased visual tracking algorithm on a SIMD MasPar MP-1 and the mixed-mode PASM prototype. The sequential algorithm is introduced...