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MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
14 years 9 months ago
An integrated approach to accelerate data and predicate computations in hyperblocks
To exploit increased instruction-level parallelism available in modern processors, we describe the formation and optimization of tracenets, an integrated approach to reducing the ...
Alexandre E. Eichenberger, Waleed Meleis, Suman Ma...
ICASSP
2011
IEEE
14 years 1 months ago
Real-time DVB-S2 LDPC decoding on many-core GPU accelerators
It is well known that LDPC decoding is computationally demanding and one of the hardest signal operations to parallelize. Beyond data dependencies that restrict the decoding of a ...
Gabriel Falcão Paiva Fernandes, Joao Andrad...
CLUSTER
2008
IEEE
15 years 4 months ago
A comparison of search heuristics for empirical code optimization
—This paper describes the application of various search techniques to the problem of automatic empirical code optimization. The search process is a critical aspect of auto-tuning...
Keith Seymour, Haihang You, Jack Dongarra
PPOPP
2010
ACM
15 years 7 months ago
Leveraging parallel nesting in transactional memory
Exploiting the emerging reality of affordable multi-core architeces through providing programmers with simple abstractions that would enable them to easily turn their sequential p...
João Barreto, Aleksandar Dragojevic, Paulo ...
IEEEPACT
2009
IEEE
15 years 4 months ago
Analytical Modeling of Pipeline Parallelism
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Ca...