5898 search results - page 885 / 1180 » Parallel Computing Environments and Methods |
152
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ICCAD
1996
IEEE
15 years 8 months ago
1996
IEEE
In this paper, we present a new capacitance extraction method named Dimension Reduction Technique (DRT) for 3D VLSI interconnects. The DRT converts a complex 3D problem into a ser...
134
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GRAPHICSINTERFACE
2009
15 years 2 months ago
2009
We present a simple and efficient method for reconstructing triangulated surfaces from massive oriented point sample datasets. The method combines streaming and parallelization, m...
165
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HPCA
2009
IEEE
16 years 4 months ago
2009
IEEE
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
157
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HPCA
2005
IEEE
16 years 4 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
165
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JSSPP
2007
Springer
15 years 10 months ago
2007
Springer
Most space-sharing parallel computers presently operated by high-performance computing centers use batch-queuing systems to manage processor allocation. Because these machines are...