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» Parallel Computing of Thermoelasticity Problems
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VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
16 years 4 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
126
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HPCA
2007
IEEE
16 years 4 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
ICPP
2008
IEEE
15 years 10 months ago
Implementing and Exploiting Inevitability in Software Transactional Memory
—Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical impleme...
Michael F. Spear, Michael Silverman, Luke Dalessan...
IPPS
2008
IEEE
15 years 10 months ago
Probabilistic allocation of tasks on desktop grids
While desktop grids are attractive platforms for executing parallel applications, their volatile nature has often limited their use to so-called “high-throughput” applications...
Joshua Wingstrom, Henri Casanova
HPDC
2007
IEEE
15 years 10 months ago
Precise and realistic utility functions for user-centric performance analysis of schedulers
Utility functions can be used to represent the value users attach to job completion as a function of turnaround time. Most previous scheduling research used simple synthetic repre...
Cynthia Bailey Lee, Allan Snavely