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133
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ICPADS
2006
IEEE
15 years 9 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
IEEEPACT
1998
IEEE
15 years 7 months ago
Adaptive Scheduling of Computations and Communications on Distributed Memory Systems
Compile-time scheduling is one approach to extract parallelism which has proved effective when the execution behavior is predictable. Unfortunately, the performance of most priori...
Mayez A. Al-Mouhamed, Homam Najjari
148
Voted
IPPS
2010
IEEE
15 years 1 months ago
Speculative execution on multi-GPU systems
Abstract--The lag of parallel programming models and languages behind the advance of heterogeneous many-core processors has left a gap between the computational capability of moder...
Gregory F. Diamos, Sudhakar Yalamanchili
180
Voted
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
14 years 7 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
99
Voted
ICIP
2009
IEEE
16 years 4 months ago
A High Throughput Cabac Algorithm Using Syntax Element Partitioning
Enabling parallel processing is becoming increasingly necessary for video decoding as performance requirements continue to rise due to growing resolution and frame rate demands. I...