Sciweavers

3660 search results - page 688 / 732
» Parallel Program Archetypes
Sort
View
CANPC
1999
Springer
15 years 2 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
ICS
1999
Tsinghua U.
15 years 2 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
ICS
1999
Tsinghua U.
15 years 2 months ago
The scalability of multigrain systems
Researchers have recently proposed coupling small- to mediumscale multiprocessors to build large-scale shared memory machines, known as multigrain shared memory systems. Multigrai...
Donald Yeung
ICDCS
1998
IEEE
15 years 2 months ago
A Feedback Based Scheme for Improving TCP Performance in Ad-Hoc Wireless Networks
Ad-hoc networks consist of a set of mobile hosts that communicate using wireless links, without the use of other communication support facilities (such as base stations). The topo...
Kartik Chandran, Sudarshan Raghunathan, S. Venkate...
CONCUR
1998
Springer
15 years 2 months ago
Algebraic Techniques for Timed Systems
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
Albert Benveniste, Claude Jard, Stephane Gaubert