1075 search results - page 17 / 215 » Parallel Programming with Transactional Memory |
94
Voted
SSS
2010
Springer
14 years 10 months ago
2010
Springer
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
90
Voted
SAC
2010
ACM
15 years 6 months ago
2010
ACM
Hardware transactional memory is a promising synchronization technology for chip-multiprocessors. It simplifies programming of concurrent applications and allows for higher concu...
82
Voted
IPPS
2009
IEEE
15 years 6 months ago
2009
IEEE
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
PPOPP
2006
ACM
15 years 5 months ago
2006
ACM
PPOPP
2010
ACM
15 years 3 months ago
2010
ACM
