1075 search results - page 83 / 215 » Parallel Programming with Transactional Memory |
137
Voted
PPOPP
1999
ACM
15 years 7 months ago
1999
ACM
Divide and conquer algorithms are a good match for modern parallel machines: they tend to have large amounts of inherent parallelism and they work well with caches and deep memory...
126
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ICASSP
2008
IEEE
15 years 9 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
129
Voted
DAC
2007
ACM
16 years 3 months ago
2007
ACM
Programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potentia...
148
Voted
PLDI
2012
ACM
13 years 5 months ago
2012
ACM
Existing dynamic race detectors suffer from at least one of the following three limitations: (i) space overhead per memory location grows linearly with the number of parallel thre...
157
Voted
ICS
1999
Tsinghua U.
15 years 7 months ago
1999
Tsinghua U.
On modern computers, the performance of programs is often limited by memory latency rather than by processor cycle time. To reduce the impact of memory latency, the restructuring ...