1075 search results - page 96 / 215 » Parallel Programming with Transactional Memory |
133
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IEEEPACT
2008
IEEE
15 years 11 months ago
2008
IEEE
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
126
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ASPLOS
1991
ACM
15 years 8 months ago
1991
ACM
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
131
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GLVLSI
2007
IEEE
15 years 11 months ago
2007
IEEE
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
127
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BIRTHDAY
2009
Springer
15 years 9 months ago
2009
Springer
For many aspects of memory theoretical treatment already exists, in particular for: simple cache construction, store buers and store buer forwarding, cache coherence protocols, o...
170
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ASPLOS
2008
ACM
15 years 6 months ago
2008
ACM
Standard concurrency control mechanisms offer a trade-off: Transactional memory approaches maximize concurrency, but suffer high overheads and cost for retrying in the case of act...