284 search results - page 16 / 57 » Parallel buffers for chip multiprocessors |
EUROPAR
2010
Springer
14 years 9 months ago
2010
Springer
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
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PDP
2011
IEEE
14 years 1 months ago
2011
IEEE
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
ICS
2011
Tsinghua U.
14 years 1 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...