284 search results - page 20 / 57 » Parallel buffers for chip multiprocessors |
78
Voted
ASAP
2006
IEEE
15 years 3 months ago
2006
IEEE
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
IEEEPACT
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
SIGARCH
2008
14 years 9 months ago
2008
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
105
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DSN
2011
IEEE
13 years 9 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
IEEEPACT
2008
IEEE
15 years 4 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...