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114
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DATE
2007
IEEE
107views Hardware» more  DATE 2007»
15 years 9 months ago
Development of an ASIP enabling flows in ethernet access using a retargetable compilation flow
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
K. Van Renterghem, P. Demuytere, Dieter Verhulst, ...
120
Voted
ICPP
2007
IEEE
15 years 9 months ago
An Effective Strategy for Porting C++ Applications on Cell
In this paper we present a solution for efficient porting of sequential C++ applications on the Cell B.E. processor. We present our step-by-step approach, focusing on its general...
Ana Lucia Varbanescu, Henk J. Sips, Kenneth A. Ros...
126
Voted
IPPS
2007
IEEE
15 years 9 months ago
Applying IC-Scheduling Theory to Familiar Classes of Computations
Earlier work has developed the underpinnings of IC-Scheduling Theory, an algorithmic framework for scheduling computations having intertask dependencies for Internet-based computi...
Gennaro Cordasco, Grzegorz Malewicz, Arnold L. Ros...
IPPS
2007
IEEE
15 years 9 months ago
An Architectural Framework for Automated Streaming Kernel Selection
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
125
Voted
IPPS
2007
IEEE
15 years 9 months ago
Mobility of Data in Distributed Hybrid Computing Systems
In distributed hybrid computing systems, traditional sequential processors are loosely coupled with reconfigurable hardware for optimal performance. This loose coupling proves to...
Philippe Faes, Mark Christiaens, Dirk Stroobandt